Case Study 2 – PCIE Backplane Interface

SCOPE OF THE PROJECT​​ ​Schematic Drafting, Placement, Routing and CAM validation
Key Challenge ​ 1932 pi Ball BGA MIPS processor, 512Mb SDRAM and PCI Bus, 0.60mm Pitch mini DIMM DDR3 etc.,
Technology Timing analysis, Reflection analysis & Crosstalk analysis​
Board Size​ 240 X 98 mm ​
Layer Count​ 16 Layers​
Total Components​ 1126​
EDA Tool Set ​ ​
Trace width & Spacing​ 4 & 4​